ISRO EC 2006 SET B

Sol: Option c)

Taking the characteristic equation

Another Method:

Sol: option C)

Sol: Option a)

Sol: Option b)
At resonance

Sol: Option d)
In a series RLC circuit:
Below resonance frequency, circuit has capacitive impedance
At resonance, circuit impedance is totally resistive
Above resonance, circuit has inductive impedance

Sol: Option d)

Sol: Option a)
In Sigma delta ADC, high bit accuracy is achieved by Over Sampling and noise shaping.

Sol: Option a)

Sol: Option b) or d)

Sol: option a)

Sol: Option a)

Sol: Option a)

Sol: Option a)




Sol: Option c)

Sol: Option a)

Sol: Option c)

Sol: Option c)

Sol: Option d) with small correction in last but first term. It should be (Xn-2)(Xn-1) '+' sign should be  removed in between .

Sol: Option a)

Sol: Option b)

Sol: Option a)

Sol: Option b)

Sol: Option d)

Sol: Option c)

Sol: Option b)

Sol: Option b)

Sol: Option d)

Sol: Option c)

Sol: Option c)

Sol: Option d)

Sol: Option a)

Sol: Option b)

Sol: Option c)
No possible grouping. 

Sol: None of the options. It is actually gray to binary converter.

Sol: Option a)

Sol: Option a)

Sol: Option d)

Sol: Option b)

Sol: Option d)

 Sol: Option d)

Sol: Option d)

Sol: Option a)

Sol: Option d)

Sol: Option c)






Sol: Option b)

Sol: Option b)

 Sol: Option d)

Sol: Option b)

Sol: Option a)

Sol: Option a)

Sol: Option c)

Sol: Option c)

Sol: Option c)

Sol: Option c)

Sol: Option d)

Sol: Option c)

Sol: Option b)

Sol: option b)

Sol: Option d)

Sol: Option a)

Sol: Option b)

Sol: Option c)

Sol: Option d)

Sol: Option c)
Hysteresis loss and Eddy current loss depends on frequency.

Sol: Option c)

Sol: Option a)

Sol: Option d)
A Capacitor blocks dc voltage. Therefore its zero steady state current.

Sol: Option b)

Sol: Option d)

Sol: Option a)

Sol: option d)







Sol: Option d)